FPGA Development EngineerEnglish summary from Japanese

株式会社アークエッジ・スペース

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Salary

750万円～1,250万円 ※ スキル・経験を考慮して決定します。 ※ 残業代は別途支給

Location

有明オフィス（東京都江東区） ※基本オフィス出社、リモート一部可 ※受動喫煙対策：屋内全面禁煙【勤務地の変更の範囲について】（雇入れ直後）上記勤務地（変更の範囲）上記勤務地及び会社の定める場所(テレワークを行う場所含む)

Work Style

・フレックスタイム制（フルフレックス）・所定労働時間：8時間00分（休憩60分）・標準的な勤務時間帯：9:00~18:00（例）

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Role summaryEnglish summary from Japanese

English summary for screening — check the original posting before applying.

Develop FPGA logic for ultra-small artificial satellites, contributing to the design and development of complex integrated systems. This role offers the opportunity to grow into overall satellite system design.

Must-haves

Experience in team-based product development
FPGA logic design experience
Basic knowledge of Linux commands

Nice-to-haves

Experience in electrical circuit design and PCB artwork design
FPGA logic design experience with Xilinx (Zynq SoC development is a plus)
Knowledge of Kalman filter theory and application
Knowledge of space engineering, satellite orbital mechanics, and perturbation
Ability to read and understand technical documents in English

Tech stack

Verilog HDLCLinuxVivadoGitHub

About the Company